DocumentCode :
3710373
Title :
Design and implementation of high speed A/D converter using time interleaving
Author :
Young Woo Choi;Do Wook Kang;Dong Kyoo Kim
Author_Institution :
Smart Mobility Research Department, Electronics and Telecommunications Research Institute, Daejeon, Korea (Rep. of)
fYear :
2015
Firstpage :
999
Lastpage :
1002
Abstract :
Time Interleaved A/D Converter (TI-ADC) is a parallel combination of multiple ADCs having low sampling rates and it is capable of high-speed sampling in real time. The performance of the digital system to receive the analog signal depends on the performance of the ADC. However it has the disadvantage of increasing the cost using high-speed sampling ADC. To solve this problem, high-speed sampling ADC is implemented using time interleaving by a combination of a low cost, low-speed ADC and can be used for a system demanding high-speed real time sampling technology.
Keywords :
"Clocks","Signal processing","Field programmable gate arrays","Analog-digital conversion","Hardware","Ground penetrating radar","Delays"
Publisher :
ieee
Conference_Titel :
Information and Communication Technology Convergence (ICTC), 2015 International Conference on
Type :
conf
DOI :
10.1109/ICTC.2015.7354723
Filename :
7354723
Link To Document :
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