Title :
Electron concentration behavior in junctionless vs junction SOI n-MOSFET transistor
Author :
A. R. N. Huda;M. K. Md Arshad;Noraini Othman;C. H. Voon;R. M. Ayub;Subash C. B. Gopinath;K. L. Foo;A. R. Ruslinda;U. Hashim;H. Cheun Lee;P. Y. P. Adelyn;S. M. Kahar
Author_Institution :
Institute of Nano Electronic Engineering, Universiti Malaysia Perlis, Kangar, Perlis, Malaysia
Abstract :
In this paper, the effect of gate workfunction variation on electron concentration at depletion and inversion as a function of applied gate voltage for 100 nm gate length silicon-on-insulator (SOI) junctionless (JLT) and junction (JT) transistors are investigated. It shows that the JLT device is properly function and achieving full-depletion without losing gate controllability at higher gate workfunction of more than 5.0 eV whereas the designated JT device is more wider range, ranging from low, mid-gap or high workfunction.
Keywords :
"Logic gates","Transistors","Junctions","Doping","Numerical models","Color","Performance evaluation"
Conference_Titel :
Micro and Nanoelectronics (RSM), 2015 IEEE Regional Symposium on
DOI :
10.1109/RSM.2015.7354982
