DocumentCode :
3711819
Title :
A fully logic CMOS compatible non-volatile memory for low power IoT applications
Author :
Yu Wang;Junhui Xiang;Xianliang Chen;Tao Yang;Na Yan;Hao Min
Author_Institution :
State Key Laboratory of ASIC and System, Fudan University, Shanghai, China
fYear :
2015
Firstpage :
98
Lastpage :
103
Abstract :
This paper presents a 512-bit low power electrically programmable embedded non-volatile memory (eNVM) for the Internet of Things (IoT) applications. A novel memory bit cell which is fully compatible to the CMOS logic process is developed using dual tunneling gate structure. Costumer designed lateral double diffused MOS transistor (LDMOS) is proposed in a novel high voltage management circuit to improve the reliability and safety of the memory established by thin gate oxide transistors. In charge pump design, a frequency step-up scheme is proposed to control the current surge during writing operation, thus large voltage droops in the power supply is prevented, improving the stability of the system. The memory is implemented in a standard 0.13μm CMOS technology process. Measured results indicate that under the supply voltage of 1.2 V, it consumes 9.2 μW (22.9 μW) at the read (write) rate of 6.78 Mb/s (8 kb/s). Endurance characteristics under 100k program cycles stress test and data retention characteristics of up to 10 years are demonstrated.
Keywords :
"Decision support systems","Internet of things","Conferences","Logic gates","Tunneling","Charge pumps","CMOS integrated circuits"
Publisher :
ieee
Conference_Titel :
Internet of Things (IOT), 2015 5th International Conference on the
Print_ISBN :
978-1-4673-8056-0
Type :
conf
DOI :
10.1109/IOT.2015.7356553
Filename :
7356553
Link To Document :
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