DocumentCode
3711839
Title
A low-power switched-capacitor passive sigma-delta modulator
Author
Angsuman Roy;R. Jacob Baker
Author_Institution
Department of Electrical and Computer Engineering, University of Nevada, Las Vegas
fYear
2015
Firstpage
1
Lastpage
4
Abstract
A passive 2nd-order sigma-delta modulator using switched-capacitor based filters was designed, fabricated, and tested. A novel 2nd-order single feedback path topology is used. All circuitry is optimized for low power operation through the use of minimum size MOSFETs, component reduction and topology choice. The modulator was fabricated in On Semiconductor´s C5 500-nm process. The implementation achieves a typical SNDR of above 50 dB for tested frequencies of 10 Hz to 3 kHz and has a peak SNDR of 57.8 dB, which corresponds to an ENOB of 9.3 bits. With a 2.5 V supply, the power consumption of the sigma-delta modulator is 6.75 μW. The modulator achieves a FOM of 1.78 pJ/step.
Keywords
"Clocks","Topology","Switches","Frequency modulation","Power demand","Resistors"
Publisher
ieee
Conference_Titel
Circuits and Systems Conference (DCAS), 2015 IEEE Dallas
Type
conf
DOI
10.1109/DCAS.2015.7356584
Filename
7356584
Link To Document