Title :
A novel TSV probing technique with adhesive test interposer
Author :
Li Jiang;Xiangwei Huang;Hongfeng Xie;Qiang Xu;Chao Li;Xiaoyao Liang;Huiyun Li
Author_Institution :
Department of CS&E, Shanghai Jiao Tong University, Shanghai, China
Abstract :
TSVs can be fabricated with pitch of only tens of μm, and smaller. They can be densely distributed as inter-die interconnect in 3D ICs. However, the huge mismatch between the probe technology, such as the pitch of probe head and the capacity of probe card, and the TSV fabrication technology leads to an insufficient probe on TSV tips. In this paper, we present a novel TSV probing technique that can temporally bond pre-bond die to test interposer using anisotropic conductive adhesive material. On the two sides of the test interposer, TSVs and probe heads make contact with microbumps and C4-bumps, respectively. These two types of bumps are connected using redistribution metal layers, passing through the test interposer, which can bridge the gap between feature sizes of TSVs and probe head. This probing technology is also able to increase the test bandwidth by enlarging the test interposer and redistributing test signals between microbumps and C4-bumps. Moreover, the number of probe-card touchdown can be reduced by sharing the test interposer among multiple dies during the wafer-level testing. Simulation results on the corresponding test structures for TSVs open fault and leakage fault show the great test resolution and robustness considering different design choices and variable design parameters among the test structures.
Keywords :
"Through-silicon vias","Probes","Testing","Three-dimensional displays","Logic gates","Bandwidth","Circuit faults"
Conference_Titel :
Computer Design (ICCD), 2015 33rd IEEE International Conference on
DOI :
10.1109/ICCD.2015.7357170