• DocumentCode
    3712616
  • Title

    Chip-scale packaging of hybrid-integrated Si photonic transceiver: Optical I/O core

  • Author

    Koichi Takemura;Mitsuru Kurihara;Toshinori Uemura;Akio Ukita;Kenichiro Yashiki;Kazuhiko Kurata

  • Author_Institution
    Photonics Electronics Technology Research Association (PETRA), Tsukuba, Japan
  • fYear
    2015
  • Firstpage
    191
  • Lastpage
    194
  • Abstract
    A chip-scale package structure for Si photonic optical transceivers has been developed. The foot print of the transceiver is 5 mm × 5mm. By using an optical pin array and glass interposer with through-glass vias (TGVs), high density optical and electrical I/O interfaces are configured on one side of the package. The optical pin acts as a vertical waveguide or spot-size converter (SSC). The combination of the optical pin and the O-band multimode transmission provides large misalignment tolerance for the optical interface. The developed optical transceiver has a high degree of usability for various applications, such as multi-chip modules and active optical cables, and is called “optical I/O core.” The optical I/O core demonstrated 25 Gbps/ch error-free operation over a 300-m multimode fiber. The optical I/O core is a promising solution for relieving the I/O bottleneck in high-bandwidth inter-chip data transmission.
  • Keywords
    "Optical device fabrication","Optical fibers","Integrated optics","Adaptive optics","Silicon","Optical interconnections"
  • Publisher
    ieee
  • Conference_Titel
    CPMT Symposium Japan (ICSJ), 2015 IEEE
  • Print_ISBN
    978-1-4799-8814-3
  • Type

    conf

  • DOI
    10.1109/ICSJ.2015.7357394
  • Filename
    7357394