DocumentCode :
3713157
Title :
An image processor for convolution and correlation of binary images implemented in FPGA
Author :
Susana Ortega Cisneros;Jorge Rivera D.;Pablo Moreno Villalobos;Carlos Agust?n Torres C.;H Hern?ndez-Hector;Juan Jos? Raygoza P.
Author_Institution :
CINVESTAV, Unidad Guadalajara, Zapopan, M?xico
fYear :
2015
Firstpage :
1
Lastpage :
5
Abstract :
This work presents the design and implementation of an image processor for convolution and correlation operations of black and white images using Xilinx ISE® tools. The design contains an UART module, which purpose is to allow the processor to communicate serially with other devices that use this protocol. The measures of time obtained in the processor simulation solving correlation and convolution operations, with and without the UART module are presented, and its comparison versus the time that MATLAB® takes to process the same operations with the same images.
Keywords :
"Convolution","Correlation","Field programmable gate arrays","MATLAB","Registers","Electrical engineering","Cities and towns"
Publisher :
ieee
Conference_Titel :
Electrical Engineering, Computing Science and Automatic Control (CCE), 2015 12th International Conference on
Type :
conf
DOI :
10.1109/ICEEE.2015.7357987
Filename :
7357987
Link To Document :
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