Performance evaluation of low voltage Schmitt triggers using variable Threshold techniques

In this paper, a low voltage Schmitt trigger has been designed using various low voltage MOS transistor implementation techniques namely-Dynamic Threshold MOS (DTMOS), Multiple threshold MOS (MTMOS), Variable threshold MOS (VTMOS) and Floating gate MOS (FGMOS). The conventional and proposed circuits are designed in 180nm CMOS technology from TSMC and simulated at 0.5 Volts. The comparative study of the performance of proposed Schmitt triggers in terms of width of the hysteresis curve, delay introduced and power dissipation for same inputs and supply voltages has been done and based on the results obtained, application for each Schmitt trigger has been suggested.