• DocumentCode
    3714757
  • Title

    Noise reduction by pixel circuit optimization in 4-T pixel structure detectors using integrated circuit technologies

  • Author

    Johan Venter;Saurabh Sinha

  • Author_Institution
    Department of Electrical Engineering Technology, Faculty of Engineering and the Built Environment, Doornfontein Campus, University of Johannesburg, South Africa
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    The most commonly used pixel structure in integrated circuit technologies is the three-transistor pixel structure (3-T). This structure consists of a pixel, a reset transistor, a source follower and a pixel select transistor. An extension to this is the 4-T pixel structure where an extra transistor is included to enable current steering in the readout phase and reset phase. This greatly reduces current consumption compared to the conventional 3-T pixel structure. Simulation results depicting this optimization is provided to support the technical contribution of this paper.
  • Keywords
    "Detectors","Logic gates","Transistors","Photonics","Resistors","Integrated circuits","Voltage control"
  • Publisher
    ieee
  • Conference_Titel
    Microwaves, Communications, Antennas and Electronic Systems (COMCAS), 2015 IEEE International Conference on
  • Type

    conf

  • DOI
    10.1109/COMCAS.2015.7360363
  • Filename
    7360363