• DocumentCode
    3717083
  • Title

    Dynamic re-vectorization of binary code

  • Author

    Nabil Hallou;Erven Rohou;Philippe Clauss;Alain Ketterlin

  • Author_Institution
    Team ALF, INRIA Rennes, France
  • fYear
    2015
  • fDate
    7/1/2015 12:00:00 AM
  • Firstpage
    228
  • Lastpage
    237
  • Abstract
    In many cases, applications are not optimized for the hardware on which they run. Several reasons contribute to this unsatisfying situation, including legacy code, commercial code distributed in binary form, or deployment on compute farms. In fact, backward compatibility of ISA guarantees only the functionality, not the best exploitation of the hardware. In this work, we focus on maximizing the CPU efficiency for the SIMD extensions and propose to convert automatically, and at runtime, loops vectorized for an older version of the SIMD extension to a newer one. We propose a lightweight mechanism, that does not include a vectorizer, but instead leverages what a static vectorizer previously did. We show that many loops compiled for x86 SSE can be dynamically converted to the more recent and more powerful AVX; as well as, how correctness is maintained with regards to challenges such as data dependences and reductions. We obtain speedups in line with those of a native compiler targeting AVX. The re-vectorizer is implemented inside a dynamic optimization platform; it is completely transparent to the user, does not require rewriting binaries, and operates during program execution.
  • Keywords
    "Optimization","Hardware","Computational modeling","Registers","Computer architecture","Binary codes","Heuristic algorithms"
  • Publisher
    ieee
  • Conference_Titel
    Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2015 International Conference on
  • Type

    conf

  • DOI
    10.1109/SAMOS.2015.7363680
  • Filename
    7363680