ViPES 2015 - Preface

The first two editions of the Workshop on Virtual Prototyping of Parallel and Embedded Systems (ViPES) were co-located with the International Parallel & Distributed Processing Symposium (IPDPS) in 2013 and 2014. They took place in Boston and Phoenix, USA, respectively. The third edition of ViPES was held on the 19th of July, 2015, co-located with the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), in the beautiful Greek island that carries the same name. As in previous editions, ViPES continues to be a greatly specialized venue where researchers meet to discuss topics related to the emerging topic of virtual prototyping, i.e., a technology that allows to develop system´s hardware and software before real hardware prototypes become available. The advantage of virtual prototyping is the possibility to exchange parts in the system setup with faster turnaround times in comparison to the traditional development process, where a time consuming redesign of the complete board has to be done. Since some years, the community exploiting these novel methods has grown as time to market plays a major role in industry. Additionally, the increasing complexity of embedded and cyber-physical systems forces system architects to perform a time-consuming design space exploration. For academics, virtual prototyping is also a hot topic. Researchers use virtual prototypes to develop future systems and to enable an outlook into the next generation of embedded systems and devices. The wide range of application scenarios for this type of development includes amongst others automotive, avionics, railway, consumer and medicine applications. In particular, ViPES focuses on virtual prototyping development tools, methods for virtual prototyping of complex systems, application development with virtual platforms, methods for Hardware / Software Codesign with virtual platforms, design space exploration for parallel and distributed multicore and cyber-physical systems, estimation of system characteristics in an early stage of development, functional verification at a high level of abstraction, methods for modeling of IP cores with SystemC and usage of Architecture Description Languages (ADL) for IP-core development.