Title :
Low power unrolled CORDIC architectures
Author :
Peter Nilsson; Yuhang Sun;Rakesh Gangarajaiah;Erik Hertz
Author_Institution :
Department of Electrical and Information Technology, Lund University, Sweden
Abstract :
This paper shows a novel methodology to improve unrolled CORDIC architectures. The methodology is based on removing adder stages starting from the first stage. As an example, a 19-stage CORDIC is used but the methodology is applicable on CORDICs with an arbitrary number of stages. The CORDIC is implemented, simulated, and synthesized into hardware. In the paper, the performance is shown to be increased by 23% and that the dynamic power can be reduced by 27%.
Keywords :
"Computer architecture","Adders","Microprocessors","Power demand","Hardware","Silicon","Approximation methods"
Conference_Titel :
Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC), 2015
DOI :
10.1109/NORCHIP.2015.7364396
