DocumentCode :
3718285
Title :
Thermal performance evaluation of Power QFN package with stacked and side by side die configuration
Author :
Cheong Chiang Ng
Author_Institution :
Freescale Semiconductor Malaysia Sdn. Bhd., 2 Jalan SS 8/2, FIZ Sungei Way, 47300 P.J., Selangor, Malaysia
fYear :
2015
Firstpage :
184
Lastpage :
187
Abstract :
Currently available Quad Flat No-lead package with 8 mils thick die pad, fails to meet the high power dissipation requirements of automotive, industrial, and commercial applications. The use of 20 mils thick die pad and heavy gauge aluminum bond wires in the Power Quad Flat No-lead package helps transfer heat from package while providing low electrical resistance. Side by side die configuration limits the capability to reduce the package size. A stacked die configuration eliminates the extra space for control die and flag. Thermal performance of both configurations was evaluated by using simulation tool under three different conditions, i.e. JEDEC thermal resistance measure for steady state operating condition, thermal impedance for transient switching operating condition, and thermal interaction of multiple independent heat sources in the package.
Keywords :
"Junctions","Thermal resistance","Power dissipation","Heating","Lead","Impedance"
Publisher :
ieee
Conference_Titel :
Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2015 10th International
Print_ISBN :
978-1-4673-9690-5
Type :
conf
DOI :
10.1109/IMPACT.2015.7365173
Filename :
7365173
Link To Document :
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