DocumentCode :
3719791
Title :
Exploring custom heterogeneous MPSoCs for real-time neural signal decoding
Author :
Paolo Meloni;Giuseppe Tuveri;Danilo Pani;Luigi Raffo;Francesca Palumbo
Author_Institution :
Dipartimento Ingegneria Elettrica ed Elettronica, Universit? degli Studi di Cagliari, Cagliari, Italy 09123
fYear :
2015
Firstpage :
1
Lastpage :
8
Abstract :
The design of embedded systems for neuroprosthetic applications represents an important challenge to be faced in electronic bioengineering. One of the key research problems is decoding the information encoded in neural signals to extract the patient´s motion intention. How to implement a highly-portable and reliable integrated solution is still an open issue. In this paper, we investigate the possibility of adopting the MPSoC paradigm in this application domain, presenting a design space exploration that evaluates different custom MPSoC embedded architectures, implementing an on-line neural signal decoding algorithm. The evaluated design points feature different mappings of parallel software tasks onto customized ASIP processing cores. Experimental results, obtained by FPGA-based prototyping, assess the performance and hardware-related costs of the considered configurations. The clock frequency needed to respect real-time constraints was reduced to 22 MHz, making a step further towards the exploitation of custom heterogeneous MPSoCs for ultra-low power biomedical signal processing.
Keywords :
"Sorting","Program processors","Decoding","Real-time systems","Computer architecture","Noise reduction","Algorithm design and analysis"
Publisher :
ieee
Conference_Titel :
Design and Architectures for Signal and Image Processing (DASIP), 2015 Conference on
Type :
conf
DOI :
10.1109/DASIP.2015.7367243
Filename :
7367243
Link To Document :
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