Implementation of robust current zero anticipator for parallel current injection synthetic testing

Development in electrical power transmission system requires the use of circuit breakers with increasing breaking capacity. To meet the test requirements of larger capacity of high voltage capacity, the parallel current injection synthetic testing is the most widely used method instead of direct testing, based on IEC 62271-100 and IEC 62271-101. During synthetic testing, the making switch is used to supply short circuit current and the gap-switch is triggered at the desired moment before the current zero. To control the trigger timing of gap-switch, a current zero anticipator (CZA) is essential in high power testing laboratory. This paper presents an algorithm and hardware implementation of current zero anticipator that is robust to surge current or noise in parallel current injection synthetic testing.