DocumentCode :
3723389
Title :
Co-Learning Bayesian Model Fusion: Efficient performance modeling of analog and mixed-signal circuits using side information
Author :
Fa Wang;Manzil Zaheer;Xin Li;Jean-Olivier Plouchart;Alberto Valdes-Garcia
Author_Institution :
ECE Department, Carnegie Mellon University, Pittsburgh, PA 15213, USA
fYear :
2015
Firstpage :
575
Lastpage :
582
Abstract :
Efficient performance modeling of today´s analog and mixed-signal (AMS) circuits is an important yet challenging task. In this paper, we propose a novel performance modeling algorithm that is referred to as Co-Learning Bayesian Model Fusion (CL-BMF). The key idea of CL-BMF is to take advantage of the additional information collected from simulation and/or measurement to reduce the performance modeling cost. Different from the traditional performance modeling approaches which focus on the prior information of model coefficients (i.e. the coefficient side information) only, CL-BMF takes advantage of another new form of prior knowledge: the performance side information. In particular, CL-BMF combines the coefficient side information, the performance side information and a small number of training samples through Bayesian inference based on a graphical model. Two circuit examples designed in a commercial 32nm SOI CMOS process demonstrate that CL-BMF achieves up to 5× speed-up over other state-of-the-art performance modeling techniques without surrendering any accuracy.
Keywords :
"Integrated circuit modeling","Mathematical model","Bayes methods","Training","Performance evaluation","Graphical models","Complexity theory"
Publisher :
ieee
Conference_Titel :
Computer-Aided Design (ICCAD), 2015 IEEE/ACM International Conference on
Type :
conf
DOI :
10.1109/ICCAD.2015.7372621
Filename :
7372621
Link To Document :
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