DocumentCode :
3723415
Title :
Hardware accelerator design for data centers
Author :
Serif Yesil;Muhammet Mustafa Ozdal;Taemin Kim;Andrey Ayupov;Steven Burns;Ozcan Ozturk
Author_Institution :
Intel Corp., Hillsboro, OR 97124, USA
fYear :
2015
Firstpage :
770
Lastpage :
775
Abstract :
As the size of available data is increasing, it is becoming inefficient to scale the computational power of traditional systems. To overcome this problem, customized application-specific accelerators are becoming integral parts of modern system on chip (SOC) architectures. In this paper, we summarize existing hardware accelerators for data centers and discuss the techniques to implement and embed them along with the existing SOCs.
Keywords :
"Field programmable gate arrays","Acceleration","Graphics processing units","Big data","Libraries","Hardware"
Publisher :
ieee
Conference_Titel :
Computer-Aided Design (ICCAD), 2015 IEEE/ACM International Conference on
Type :
conf
DOI :
10.1109/ICCAD.2015.7372648
Filename :
7372648
Link To Document :
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