DocumentCode :
3723437
Title :
ICCAD-2015 CAD contest in large-scale equivalence checking and function correction and benchmark suite
Author :
Chih-Jen Hsu;Chi-An Wu;Wei-Hsun Lin;Kei-Yong Khoo
Author_Institution :
Cadence Taiwan, Inc., 6-5, Du Sing Rd., Industrial Based Science Park, Hsinchu, Taiwan
fYear :
2015
Firstpage :
916
Lastpage :
920
Abstract :
Equivalence checking (EC) and functional Engineering Change Order (ECO) on large-scale designs becomes a crucial industrial topic as the design scale expands. In this topic, we are especially interested in how to partition the large-scale problems into smaller EC and ECO problem with lower complexity. In this contest, we ask the participants to design the algorithm to insert the corresponding cuts as the partitioned points on given two designs as simplifying the EC and ECO problems. The team correctly simplifying the problem most wins the contest. The benchmark suites are extracted from the real designs in our interesting applications. We look forward to triggering the academic area to investigate on this problem.
Keywords :
"Wires","Logic gates","Benchmark testing","Complexity theory","Engines","Impedance matching","Algorithm design and analysis"
Publisher :
ieee
Conference_Titel :
Computer-Aided Design (ICCAD), 2015 IEEE/ACM International Conference on
Type :
conf
DOI :
10.1109/ICCAD.2015.7372670
Filename :
7372670
Link To Document :
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