DocumentCode :
3723438
Title :
ICCAD-2015 CAD contest in incremental timing-driven placement and benchmark suite
Author :
Myung-Chul Kim;Jin Hu;Jiajia Li;Natarajan Viswanathan
Author_Institution :
IBM Corporation, Austin, TX 78758, USA
fYear :
2015
Firstpage :
921
Lastpage :
926
Abstract :
At modern technology nodes, improving routability and reducing total wirelength are no longer sufficient to close timing. Incremental timing-driven placement (TDP) seeks to resolve timing violations while limiting the impact to the original placement in an effort to achieve timing closure. To improve the timing landscape in localized regions, some latches or nets may require specialized attention that may not be available in other traditional placement flows (e.g., wirelength-driven). To address this problem, the ICCAD-2015 contest encourages advanced research in incremental timing-driven placement, by providing (i) a flexible timing-oriented placement framework, including a publicly-available and high-quality academic timer, (ii) a set of realistic benchmarks that facilitates academic and commercial collaboration, (iii) an evaluation metric that objectively defines the quality of newly-developed algorithms.
Keywords :
"Clocks","Delays","Benchmark testing","Integrated circuit modeling","Interpolation","Optimization"
Publisher :
ieee
Conference_Titel :
Computer-Aided Design (ICCAD), 2015 IEEE/ACM International Conference on
Type :
conf
DOI :
10.1109/ICCAD.2015.7372671
Filename :
7372671
Link To Document :
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