Title :
Design of low phase noise and wideband frequency synthesizer from 31.25MHz to 8GHz
Author :
Maomao Xia;Xiao-Wei Zhu;Nianzu Zhang
Author_Institution :
School of Information Science and Engineering, Southeast University, Nanjing 210096, China
fDate :
6/1/2015 12:00:00 AM
Abstract :
PLL is widely used in a variety of frequency synthesis systems. This paper presents a wideband frequency synthesizer method using a passive frequency double and programmable frequency dividers. The wideband frequency synthesizer contains basic PLL, programmable power processing circuitry, frequency multiplying circuit and frequency dividing circuit. The paper finally provide a wideband frequency from 31.25MHz to 8GHz, typical phase noise is -110dBc/Hz@100Hz, -114.dBc/Hz@1kHz, -115dBc/Hz@10kHz, -112dBc/Hz@100kHz, -131.3dBc/Hz@1MHz with all frequency normalized to 1GHz.
Keywords :
"Frequency synthesizers","Phase locked loops","Frequency conversion","Phase noise","Wideband","Attenuators","Frequency control"
Conference_Titel :
Antennas and Propagation (APCAP), 2015 IEEE 4th Asia-Pacific Conference on
DOI :
10.1109/APCAP.2015.7374449
