• DocumentCode
    3725617
  • Title

    Performance analysis of a multilevel inverter topology with reduced switches

  • Author

    E. Sravani;N. Ravi Sankar Reddy

  • Author_Institution
    Electrical and Electronics Dept., G. Pulla Reddy Engineering College, Kurnool, Andhra Pradesh, India
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    Multilevel inverter is very effective in reducing the harmonics of AC waveform and useful for high power applications. Compared to the conventional two level inverters, it has many advantages such as higher dc link voltages, low electromagnetic interference and reduced harmonic distortion. But, it has some disadvantages such as usage of more switches, voltage balancing problem and complex pulse width modulation control. Overcoming these disadvantages, in this paper a new multilevel inverter topology with reversing voltage component to improve the overall performance is proposed. The proposed topology requires less number of switches and carrier signals compared to other topologies. Hence the overall cost and complexity of the circuit is reduced especially for higher output levels. The performance of a nine level proposed topology has been analyzed in terms of total harmonic distortion (THD) by using MATLAB/Simulink.
  • Keywords
    "Inverters","Topology","Switches","Capacitors","Frequency modulation"
  • Publisher
    ieee
  • Conference_Titel
    Computer, Communication and Control (IC4), 2015 International Conference on
  • Type

    conf

  • DOI
    10.1109/IC4.2015.7375540
  • Filename
    7375540