Title :
Lower order harmonic reduction in eleven level inverter with buck topology
Author :
Sunny A. Neve;Vinayak G. Asutkar
Author_Institution :
Department of Instrumentation Engineering, SGGS IE&T, Nanded 431606., Maharashtra, India
Abstract :
There are several Multilevel inverter topology emerge in new era. But several are complex in nature as number of level increases, hence for medium and low power conversion and to reduce complexity of the circuitry, interfacing of Buck Converter and simple H-bridge two level inverter is proposed with great flexibility of control and design, also less complex as level increases. By using appropriate duty cycle, voltage level at output controls, which makes staircase waveform at the buck converter output in first stage and by converting it into alternate form at H-bridge inverter output at second stage, AC supply obtains. By using the simple switching strategy method of selective harmonic elimination, particular order of harmonic reduced. Like this number of capacitors, diodes, power switches reduced a lot. Here three LC sections are designed for particular range of load, Hence we can import any type of load on this configuration, it will select particular LC stage by sensing load current for respective load range.
Keywords :
"Inverters","Switches","Harmonic analysis","Power harmonic filters","Voltage control","Total harmonic distortion","Capacitors"
Conference_Titel :
Computer, Communication and Control (IC4), 2015 International Conference on
DOI :
10.1109/IC4.2015.7375617