• DocumentCode
    3727402
  • Title

    A power amplifier with envelope tracking used for cellular front-end module based on 0.18?m SOI CMOS process

  • Author

    Yanbin Xiao;Chunqi Yao;Yu Liu;Zhiqiang Li;Haiying Zhang

  • Author_Institution
    Radio Frequency Integration Circuits Department, Institute of Microelectronics, Chinese Academy of Sciences, China
  • fYear
    2015
  • Firstpage
    160
  • Lastpage
    162
  • Abstract
    An ET-PA used for battery supplied Front-End Module (FEM) is fabricated with IBM 0.18μm silicon-on-insulator (SOI) CMOS process. The 2-stages single-end SOI CMOS PA employs stacked-FET along with optimal bias and cancelling capacitance variation linearization method. Harmonic short at the output is used for improved linearity and stability. The supply modulator employs hybrid topology for linearity and efficiency trade-off. In measurement, the LTE signal mask is met without using a digital pre-distortion technique. For 20MHz 16QAM long-term evolution (LTE) signal at 2.3GHz carrier, the ET-PA module achieves a power-added efficiency of 30% with an error vector magnitude of 3.4% and an adjacent channel leakage ratio of 30dBc at an average output power of 26dBm.
  • Keywords
    "CMOS integrated circuits","Modulation","Power amplifiers","CMOS process","Harmonic analysis","Linearity","Topology"
  • Publisher
    ieee
  • Conference_Titel
    Radio-Frequency Integration Technology (RFIT), 2015 IEEE International Symposium on
  • Type

    conf

  • DOI
    10.1109/RFIT.2015.7377920
  • Filename
    7377920