DocumentCode :
3727409
Title :
An 80 GHz programmable frequency divider for wideband mm-Wave frequency ramp synthesis
Author :
M. van Delden;G. Hasenaecker;N. Pohl;K. Aufinger;T. Musch
Author_Institution :
Institute of Electronic Circuits, Ruhr-Universitat Bochum, Germany
fYear :
2015
Firstpage :
181
Lastpage :
183
Abstract :
A programmable frequency divider operating at input frequencies from DC to 80 GHz for the use in fractional-N synthesizers is presented. The division factor can be set to all integer values between 12 and 259 and is applied by an 8 bit parallel interface for fast modulation. The remarkably high input frequency in combination with the programmability is achieved by a dual-modulus concept and differential emitter-coupled logic with a consequent merging of logic gates into flip-flops. Among this, a reset function has been implemented to synchronize multiple synthesizers. The frequency divider has been realized in a SiGe BiCMOS technology (fr/fmax=250/360 GHz). The divider works at a supply voltage of 3.3 V with a power consumption of less than 390 mW.
Keywords :
"Frequency conversion","Synchronization","Frequency synthesizers","Phase noise","Synthesizers","Logic gates","Power demand"
Publisher :
ieee
Conference_Titel :
Radio-Frequency Integration Technology (RFIT), 2015 IEEE International Symposium on
Type :
conf
DOI :
10.1109/RFIT.2015.7377927
Filename :
7377927
Link To Document :
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