A novel method to reduce ancilla and garbage bits of reversible quantum multipliers

Reversible logic is widely used in optical information processing, bioinformatics and quantum computing etc. Reversible logic requires ancilla inputs and garbage outputs to keep reversibility. However, it needs to reduce the number of these logic bits in complex designs, such as reversible quantum multipliers. In the existing literatures, researchers have optimized the multi-operand addition part and the partial product generation part of reversible quantum multipliers separately, which produce considerable overhead in terms of garbage outputs and ancilla inputs. This paper presents a novel method to reduce garbage outputs and ancilla inputs of reversible quantum multipliers. The proposed methodology converts some garbage outputs of the previous calculation to zeros, which are then served as ancilla inputs of the later calculation. In order to verify the proposed method, we apply it to two typical reversible quantum multiplier designs. Results show that the proposed method can greatly reduce the number of garbage outputs and ancilla inputs compared to the existing designs.