DocumentCode
3731687
Title
Characterization and simulation for 2.5-D interposer
Author
Chung-Long Pan;Yu-Jung Huang;Chun-Yi Wang
Author_Institution
Department of Electrical Engineering, I-Shou University, Kaohsiung 84008, Taiwan
fYear
2015
Firstpage
74
Lastpage
77
Abstract
Characterization of interposer in a 2.5-D stacked IC is essential for yield learning and design optimization. To examine the effect of design parameters of the interposer structure on different substrate materials, the S11 and S21 curves for various substrate materials are obtained from the full-wave simulation. With the simulation results, it is observed that polyimide and glass interposer shows better electrical performance compared to silicon interposer.
Keywords
"Substrates","Silicon","Through-silicon vias","Three-dimensional displays","Glass","Packaging","Conductivity"
Publisher
ieee
Conference_Titel
Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2015 IEEE
Type
conf
DOI
10.1109/EDAPS.2015.7383671
Filename
7383671
Link To Document