Loopback test for 3D stacked integrated circuits

A high performance system design using AC coupled interconnect (ACCI) technology not only achieves shorter and faster interconnection between dies but also increases packaging density. AC-coupling enables chip placed face-to-face for signal transmission using close-field capacitive coupling. This paper describes a loopback architecture suitable for testing three-dimensional integrated circuit (3D IC, 3D-IC, or 3-D IC) stacked applications. The AC-Coupled face-to-face (F2F) chip was simulated using HSPICE with TSMC 0.18-μm 1P6M CMOS technology process file under a 1.8 V supply voltage. The simulation results indicated the proposed circuit with the self-test characteristics can achieve differential signal transmission up to 2.5 Gbps.