DocumentCode :
3731722
Title :
Power and ground co-reference design for 16-32Gbps transceiver packages
Author :
Siow Chek Tan;Hong Shi;Sarajuddin Niazi
Author_Institution :
Xilinx Inc., 2100 Logic Drive, San Jose, CA 95124, USA
fYear :
2015
Firstpage :
186
Lastpage :
188
Abstract :
The applications to increasing number of transceivers and data rate require extra ground pins (i.e. BGA balls) reserved for channel isolation and crosstalk control. To improve total pin utilization, a transceiver package often resorts to power pins to replace up to 50% of ground pins. However, power pins can fail providing adequate isolation for transceivers operating at 16Gbps and higher data rate. In this paper, we provide latest study results to the fundamental physics of transceiver crosstalk arising from power pin isolation. The mechanism is validated by modeling and simulation in both signal and power distribution network (PDN) domains. It is demonstrated that PDN resonance is reciprocally proportional to the crosstalk introduced. Most importantly, proper design approach is introduced to ensure power-ground co-referencing to deliver nearly identical performance as all-ground scheme in the 50dBs.
Keywords :
"Pins","Crosstalk","Transceivers","Impedance","Couplings","Transfer functions","Passband"
Publisher :
ieee
Conference_Titel :
Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2015 IEEE
Type :
conf
DOI :
10.1109/EDAPS.2015.7383706
Filename :
7383706
Link To Document :
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