• DocumentCode
    3733934
  • Title

    A 25-Gb/s 480-mW CMOS modulator driver using area-efficient 3D inductor peaking

  • Author

    Shinsuke Nakano;Masafumi Nogawa;Hideyuki Nosaka;Akira Tsuchiya;Hidetoshi Onodera;Shunji Kimura

  • Author_Institution
    NTT Device Innovation Center, NTT Corporation, Kanagawa, Japan
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    We propose a low-power and compact 25-Gb/s differential CMOS modulator driver. To achieve low power consumption, we employ an output driver with a high-gain single-stage amplifier and a gainless pre-driver with an equalizer function. In the pre-driver, we use area-efficient 3D inductors for the inductor peaking technique to obtain the equalizer function with compactness. We also employ a cascode amplifier consisting of high-voltage and standard MOSFETs to output a large voltage swing in CMOS technology. The proposed driver was fabricated in 65-nm 1P9M standard CMOS. It exhibits a data rate of 25 Gb/s, a differential output swing of 3.3 Vpp with an input swing of 300 mVpp, and power consumption of 480 mW with 1.2-/3.3-V dual supplies. The active area is only 0.029 mm2, including all inductors. The results indicate that the best power efficiency, which is 26 % better than the state of the art, and good power consumption versus output swing FoM (mW/Vpp) are achieved.
  • Keywords
    "Modulation","Inductors","CMOS integrated circuits","Power demand","Standards","CMOS technology","Three-dimensional displays"
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference (A-SSCC), 2015 IEEE Asian
  • Type

    conf

  • DOI
    10.1109/ASSCC.2015.7387470
  • Filename
    7387470