• DocumentCode
    3733935
  • Title

    A 550–2260MHz self-adjustable clock generator in 28nm FDSOI

  • Author

    Jaehwa Kwak;Borivoje Nikoli?

  • Author_Institution
    Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA, USA
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A self-adjustable clock generator that closely tracks the voltage dependence of the critical path delay in a microprocessor is presented. Real-time frequency modulation performed by a tunable replica circuit (TRC) reduces the response time to a single cycle, by picking the appropriate phases of the delay-locked loop (DLL). The generator has wide tuning range of 550-2260 MHz at 1V supply voltage, works down to 35 MHz at 0.4V supply, and can continuously synthesize the clock signal for arbitrary voltage waveforms between 0.4V and 1V. The proposed design was implemented in a 28nm FDSOI, and occupies an area of 1120μm2 with 2.7mW of power consumption.
  • Keywords
    "Clocks","Generators","Delays","Image edge detection","Flip-flops","Detectors","Inverters"
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference (A-SSCC), 2015 IEEE Asian
  • Type

    conf

  • DOI
    10.1109/ASSCC.2015.7387471
  • Filename
    7387471