• DocumentCode
    3733957
  • Title

    A 1.7?2.1GHz +23dBm TX power compatible blocker tolerant FDD receiver with integrated duplexer in 28nm CMOS

  • Author

    Matteo Ramella;Ivan Fabiano;Danilo Manstretta;Rinaldo Castello

  • Author_Institution
    University of Pavia, Pavia 27100, Italy
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    The first integrated duplexer compatible with a -15dBm RX blocker for up to 23dBm TX power is reported. A three winding transformer is driven at the primary by a single ended PA and drives a differential push-pull common-gate LNA. Only 45 dB isolation is required thanks to the 23 dBm RX IIP3 drastically simplifying hybrid balancing and adaptation loop. Cascaded noise figure of duplexer, LNA and base-band stays below 6.7dB and the TX insertion loss below 4 dB from 1.6 to 2.2 GHz. The chip is implemented in 28nm CMOS has an active area of 0.7mm2 and uses only 26mW.
  • Keywords
    "Impedance","Receivers","Noise measurement","Antennas","High definition video","CMOS integrated circuits","Capacitors"
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference (A-SSCC), 2015 IEEE Asian
  • Type

    conf

  • DOI
    10.1109/ASSCC.2015.7387493
  • Filename
    7387493