Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCs

A power-saving readout scheme for CMOS image sensors (CIS) that utilizes the image properties is presented. The proposed delta-readout (Δ-readout) scheme reads the signal difference between two pixels located next to each other. By effectively reducing the dynamic range of the signal, the readout ADC can reduce the number of decision cycles and save power consumption while maintaining the ADC performance at the level of a conventional ADC. The prototype QQVGA CIS with ten 10-bit SAR ADCs in a multi-column-parallel (MCP) configuration was fabricated in a 1P4M 0.18 μm CIS process with metal-insulator-metal (MIM) capacitors. The measurement results show the power-saving effect of 26% depending on the image patterns.