Title :
Assessing application areas for tunnel transistor technologies
Author :
Mar?a J. Avedillo;Juan N??ez
Author_Institution :
Instituto de Microelectr?nica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla), Spain
Abstract :
Tunnel transistors are one of the most attractive steep subthreshold slope devices currently being investigated as a means of overcoming the power density and energy inefficiency limitations of CMOS technology. In this paper, projected tunnel transistor technologies are evaluated and compared to LP and HP versions of both conventional and FinFET CMOS in terms of their power and energy in different application areas.
Keywords :
"CMOS integrated circuits","FinFETs","Inverters","Logic gates","CMOS technology"
Conference_Titel :
Design of Circuits and Integrated Systems (DCIS), 2015 Conference on
DOI :
10.1109/DCIS.2015.7388581
