Title :
Trax solver on Zynq with Deep Q-Network
Author :
Naru Sugimoto;Takuji Mitsuishi;Takahiro Kaneda;Chiharu Tsuruta;Ryotaro Sakai;Hideki Shimura;Hideharu Amano
Author_Institution :
Keio University, Yokohama 223-8522 Japan
Abstract :
A software/hardware co-design system for a Trax solver is proposed. Implementation of Trax AI is challenging due to its complicated rules, so we adopted an embedded system called Zynq (Zynq-7000 AP SoC) and introduced a High Level Synthesis (HLS) design. We also added Deep Q-Network, a machine learning algorithm, to the system for use as an evaluation function. Our solver automatically optimizes its own evaluation function through games with humans or other AIs. The implemented solver works with a 150-MHz clock on the Xilinx XC7Z020-CLG484 of a Digilent ZedBoard. A part of the Deep Q-Network job can be executed on the FPGA of the Zynq board more than 26 times faster than with ARM Coretex-A9 650-MHz software.
Keywords :
"Games","Kernel","Field programmable gate arrays","Convolution","Monte Carlo methods","Artificial intelligence","Linux"
Conference_Titel :
Field Programmable Technology (FPT), 2015 International Conference on
DOI :
10.1109/FPT.2015.7393122