Reconstruction filter for Delta-Sigma oversampling digital-to-analog converter implemented in 0.18um CMOS technology

A semi-analog reconstruction filter for oversampling Delta-Sigma digital-to-analog converter used in audio application is presented. The interpolator and modulator block is simulated using MATLAB application and the dump-file for the 1-bit PDM signal from the output of the sinc filter is used as the input for the reconstruction filter. The design for the overall block of the filter including a positive-edge triggered D flip-flop, level-shifter, 1-bit current-steering DAC, its bias circuit, second-order Sallen-Key LPF and RC LPF, is implemented in 0.18 um CMOS process technology using Synopsys Galaxy Custom Designer Tool. The analog block is supplied with 3.3 V while the digital block with 1.8 V. The total power dissipation is 2.6028 mW and the signal-to-noise ratio is 108 dB. The total die area of the layout excluding the pad is 660 um × 600 um. Including the pad, the die area is 1.245 mm × 1.305 mm.