DocumentCode :
3738929
Title :
Communication energy constrained spare core on NoC
Author :
B. Naresh Kumar Reddy;M.H. Vasantha;Y.B. Nithin Kumar;Dheeraj Sharma
Author_Institution :
Dept. of Electronics and Communication, National Institute of Technology, Goa, India
fYear :
2015
fDate :
7/1/2015 12:00:00 AM
Firstpage :
1
Lastpage :
4
Abstract :
In multi-processor system on-chip, each processor produces and consumes high data. Hence, transporting of data becomes crucial in MPSOC. Therefore, Network on Chip (NoC) is preferred as an alternate medium because it provides good communication performance with comprehensive fast operation. This paper proposes the placement of spare core and its communication energy constraints while considering temporary and permanent fault occurrences in the core. We investigated energy metrics instead of spare core, bringing up lots of saving in terms of communication energy over the previous algorithms.
Keywords :
"Fault tolerance","Fault tolerant systems","Resource management","System-on-chip","Computer architecture","Routing","Topology"
Publisher :
ieee
Conference_Titel :
Computing, Communication and Networking Technologies (ICCCNT), 2015 6th International Conference on
Type :
conf
DOI :
10.1109/ICCCNT.2015.7395168
Filename :
7395168
Link To Document :
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