DocumentCode
3739819
Title
Tamper-Resistant Security for Cyber-Physical Systems with eTRON Architecture
Author
M. Fahim Ferdous Khan;Ken Sakamura
Author_Institution
Appl. Comput. Sci., Interfaculty Initiative in Inf. Studies, Univ. of Tokyo, Tokyo, Japan
fYear
2015
Firstpage
196
Lastpage
203
Abstract
This article posits tamper-resistance as a necessary security measure for cyber-physical systems (CPS). With omnipresent connectivity and pervasive use of mobile devices, software security alone is arguably not sufficient to safeguard sensitive digital information we use everyday. As a result, utilization of a variety of tamper-resistant devices - including smartcards, secure digital cards with integrated circuits, and mobile phones with subscriber identity module - has become standard industry practice. Recognizing the need for effective hardware security alongside software security, in this paper, we present the eTRON architecture - at the core of which lies the tamper-resistant eTRON chip, equipped with functions for mutual authentication, encrypted communication and access control. Besides the security features, the eTRON architecture also offers a wide range of functionalities through a coherent set of application programming interfaces (API) leveraging tamper-resistance. In this paper, we discuss various features of the eTRON architecture, and present two representative eTRON-based applications with a view to evaluating its effectiveness by comparing with other existing applications.
Keywords
"Access control","Computer architecture","Authentication","Libraries","Cryptography","Hardware"
Publisher
ieee
Conference_Titel
Data Science and Data Intensive Systems (DSDIS), 2015 IEEE International Conference on
Type
conf
DOI
10.1109/DSDIS.2015.98
Filename
7396503
Link To Document