Facilitating side channel analysis by obfuscation for Hardware Trojan detection

Integrated Circuit (IC) piracy and malicious alteration, named as Hardware Trojan (HT), are two important threats which may happen in untrusted foundries. Functionality obfuscation has been proposed against IP/IC piracy. Obfuscation can also offer opportunities to defeat HT insertion, because the HT designer cannot understand the functionality of the obfuscated ICs. In addition various HT detection methods have been proposed based on conventional functional or structural tests, and side channel analysis. Conventional functional or structural tests are inefficient if the HT is not completely activated. HT detection by side channel analysis faces Process Variation (PV) and Environment Variation (EV). An HT is detectable if its effect is significant among PV and EV. In this work we propose to use obfuscation methods to facilitate power and path delay analysis based HT detection methods. Since shorter paths have less PV than longer paths; the first approach is to generate shorter paths for nets that only belong to long paths, while the circuit is being obfuscated. The second suggested approach is to increase the proportion of HT dynamic power to the total dynamic power of circuit, while the circuit is being obfuscated. The success of power analysis based HT detection methods is increased by increasing this proportion.