DocumentCode :
3742605
Title :
Capacitance-to-digital converter based on power detection
Author :
Mauricio Velazquez Lopez;Yong-Chang Choi;Hyung-Joun Yoo
Author_Institution :
The Department of Electrical Engineering and the Mobile Sensor and IT Convergence Center, Korea Advanced Institute of Science and Technology, 373-1 Guseong-dong, Daejeon, Republic of Korea
fYear :
2015
Firstpage :
105
Lastpage :
106
Abstract :
High resolution capacitance-to-digital converters (CDC) usually have severe capacitance range limitations or high power consumption. This paper presents a power detection based 16-bit CDC with a maximum capacitance range superior to 1 nF and a capacitance resolution as small as 0.27 fF. This work´s multi-stage power detector provides the CDC with three different sensitivity rates making it highly versatile. An on-chip low-pass filter was added to prove the method´s reliability for on-chip applications. The circuit was designed using a 0.25-μm CMOS technology, operates at a single 2.5-V supply, and consumes less than 1.86 mW.
Keywords :
"Capacitance","Detectors","System-on-chip","Cutoff frequency","Power demand","Sensitivity","Capacitive sensors"
Publisher :
ieee
Conference_Titel :
SoC Design Conference (ISOCC), 2015 International
Type :
conf
DOI :
10.1109/ISOCC.2015.7401674
Filename :
7401674
Link To Document :
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