Real-time dense stereo matching architecture for high-resolution image

In this paper we propose a real-time dense stereo matching architecture for a high-resolution image. Stereo matching shows the best performance to detect objects and to estimate distance detection. So, many algorithms have been developed, such as local matching and global matching. Disparity estimation algorithm should run at real-time to be of practical use for applications such as autonomous driving. However, they generally require large computational efforts and high memory capacities. To solve this problem, we adopt the ELAS algorithm and implemented in hardware for the real-time operation. Our architecture was implemented using Verilog HDL. Our circuit is composed of 770,305 logic gates and 3,638,016 bits internal memory. Also, our hardware architecture can extract the disparity map for the images which receive from cameras without delay in real time.