DocumentCode :
3742688
Title :
A inversion-less peterson algorithm based shared KES architecture for concatenated BCH decoder
Author :
Seungyong An;Hoyoung Tang;Jongsun Park
Author_Institution :
Korea University, Seongbuk-Gu Seoul, Republic of Korea
fYear :
2015
Firstpage :
281
Lastpage :
282
Abstract :
This paper presents a shared Key Equation Solver (KES) architecture based on inversion-less Peterson algorithm for Concatenated Bose-Chaudhuri-Hocquenghem (CBCH) decoder. In the conventional CBCH decoding approaches, the KES module has been implemented based on advanced Simplified inversion-less Berlekamp-Massey (SiBM) to reduce circuit area. However, the long latency of the advanced SiBM has been a main bottleneck for implementing high-speed KES. In the proposed approach, inversion-less Peterson algorithm with resource sharing approach has been applied to the KES of CBCH to reduce the area and latency. The experimental results show that, in case of CBCH (8720, 8192, 24) codes, the total area of KES modules is reduced by 30% compared to the KES module of the conventional CBCH design with 3X faster decoding speed.
Keywords :
"Decoding","Computer architecture","Algorithm design and analysis","Flash memories","Error correction codes","Galois fields","Microprocessors"
Publisher :
ieee
Conference_Titel :
SoC Design Conference (ISOCC), 2015 International
Type :
conf
DOI :
10.1109/ISOCC.2015.7401757
Filename :
7401757
Link To Document :
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