A low noise amplifier in 130 nm SOI CMOS for ISM applications

This paper introduces design and implementation of microwave low noise amplifier (LNA) in 130 nm SOI CMOS technology. The LNA operating around 5.8 GHz is design for ISM 5.8GHz applications. In schematic design, the CMOS transistors are stacked for compact size. In layout verification, all inductors are verified by 3D electromagnetic simulator. The fabricated chip has achieved 7.0 gain and 3.1 dB noise figure in measurement. The size of this chip is only about 0.58×0.32 mm².