DocumentCode :
3745140
Title :
A 31 pJ/spike hybrid stochastic neuromorphic signal processor
Author :
Amir Zjajo;Nandish Mehta;Rene van Leuken
Author_Institution :
Circuits and Systems Group, Delft University of Technology, The Netherlands
fYear :
2015
Firstpage :
1
Lastpage :
2
Abstract :
Neuromorphic signal processing architectures capable of real-time applications are examined as a next generation, post- Moore, ultra-low-power computing solution [1]. Conventional von Neumann-type hardware (such as DSPs, GPUs, and FPGAs) in spiking neural networks require very high bandwidths (in the GHz range), and subsequently, high power dissipation, to efficiently transmit spike signal between the memory and the processor. In contrast, neuromorphic signal processing circuits are implemented on optimized, special purpose hardware, which can provide direct one-to-one mapping and low instruction execution redundancy [2]. Disparity between sequential-processing, conventional computing, and parallel, event-driven, biological neural systems is even more prominent in autonomous, real-time systems, especially in the presence of noisy and uncontrolled sensory input. In neural signal processing systems, the noise offers distinct advantages by inducing neuronal variability [3] and, successively, enhancing the sensitivity of neurons to environmental stimuli [4], inducing synchronization between neurons [5], and facilitating probabilistic inference [6]. Consequently, probabilistic noise models, as a resource for neural computation in the context of neuromorphic systems, are implemented as artificial neural networks and Boltzmann machines [7].
Keywords :
Integrated circuit reliability
Publisher :
ieee
Conference_Titel :
Signal Processing in Medicine and Biology Symposium (SPMB), 2015 IEEE
Type :
conf
DOI :
10.1109/SPMB.2015.7405458
Filename :
7405458
Link To Document :
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