Title :
The design rail-to-rail operational amplifier used in PGA
Author :
Xiaofang Zha;Yongsheng Yin
Author_Institution :
Insitute of VLSI Design, Hefei University of technology, Hefei 230000, China
Abstract :
This paper presents a low-power rail-to-rail amplifier with a paralleled folded-cascold structure input stage and a feedforward class AB output stage. the switch in the bias circuit is switching off to boost the driving capability when the input single is low, or else, the amplifier works on the switching on state to save power. simulations using SMIC 0.35um process moled and cadence specre at 3.3V supply voltage, the amplifier performs almost 70dB dc gain, the CMRR reaches 140dB and the lowest static power consumption is just 0.6mW.this amplifier is used in the PGA of hige precision sigma-delta ADC as a buffer to meet the input sigle range of 2.5 V when the gain of the PGA is 1 or 2.
Keywords :
"Decision support systems","Circuit synthesis","Manganese","Feedforward neural networks","Operational amplifiers"
Conference_Titel :
Anti-counterfeiting, Security, and Identification (ASID), 2015 IEEE 9th International Conference on
Print_ISBN :
978-1-4673-7139-1
Electronic_ISBN :
2163-5056
DOI :
10.1109/ICASID.2015.7405662
