• DocumentCode
    3746080
  • Title

    Analysis of a serial link for power supply induced jitter

  • Author

    Jai Narayan Tripathi;Hiten Advani;Raj Kumar Nagpal;Vijender Kumar Sharma;Rakesh Malik

  • Author_Institution
    Technology RnD, STMicroelectronics Pvt. Ltd., India
  • fYear
    2015
  • Firstpage
    127
  • Lastpage
    130
  • Abstract
    An analysis of power supply induced jitter in a high speed serial link is presented in this paper. An equivalent reduced model for serial link is used for the analysis. Jitter induced by the ripples in power delivery network is analyzed by a small signal equivalent model. The effect is modeled by a transfer function which is not technology specific and can be used generically for System-On-Chip (SoC) level design considerations. The analysis is supported by experimental results by simulation in 130nm BiCMoS RF technology and 28nm FDSOI technology (both technologies are of STMicroelectronics).
  • Keywords
    "Jitter","Power supplies","Analytical models","Equivalent circuits","Resistance","Packaging","Frequency-domain analysis"
  • Publisher
    ieee
  • Conference_Titel
    System-on-Chip Conference (SOCC), 2015 28th IEEE International
  • Electronic_ISBN
    2164-1706
  • Type

    conf

  • DOI
    10.1109/SOCC.2015.7406926
  • Filename
    7406926
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3746080