Title :
A pipeline of associative memory boards for track finding
Author :
Annovi, A. ; Bagliesi, M.G. ; Bardi, A. ; Carosi, R. ; Dell´Orso, M. ; Giannetti, P. ; Iannaccone, G. ; Morsani, F. ; Pietri, M. ; Varotto, G.
Author_Institution :
INFN, Pisa, Italy
Abstract :
We present a pipeline of associative memory boards for track finding, which satisfies the requirements of level two triggers of the next LHC experiments. With respect to previous realizations, the pipelined architecture warrants full scalability of the memory bank, increased bandwidth (by one order of magnitude), increased number of detector layers (by a factor 2). Each associative memory board consists of four smaller boards, each containing 32 programmable associative memory chips, implemented with low-cost commercial FPGA. FPGA programming has been optimized for maximum efficiency in terms of pattern density and PCB design has been optimized in terms of modularity and FPGA chip density. A complete AM board has been successfully tested at 40 MHz, and can contain 6.6×103 particle trajectories
Keywords :
content-addressable storage; field programmable gate arrays; nuclear electronics; trigger circuits; FPGA programming; LHC experiments; PCB design; associative memory boards; bandwidth; detector layers; level two triggers; low-cost commercial FPGA; pattern density; pipeline; pipelined architecture; programmable associative memory chips; track finding; Associative memory; Bandwidth; Design optimization; Detectors; Field programmable gate arrays; Large Hadron Collider; Pipelines; Roads; Scalability; Testing;
Conference_Titel :
Nuclear Science Symposium Conference Record, 2000 IEEE
Conference_Location :
Lyon
Print_ISBN :
0-7803-6503-8
DOI :
10.1109/NSSMIC.2000.949977
