DocumentCode :
3748078
Title :
Device and system level design considerations for analog-non-volatile-memory based neuromorphic architectures
Author :
S. Burc Eryilmaz;Duygu Kuzum;Shimeng Yu;H.-S. Philip Wong
Author_Institution :
Electrical Engineering Department, Stanford University, Stanford, CA 94305
fYear :
2015
Abstract :
This paper gives an overview of recent progress in the brain-inspired computing field with a focus on implementation using emerging memories as electronic synapses. Design considerations and challenges such as requirements and design targets on multilevel states, device variability, programming energy, array-level connectivity, fan-in/fan-out, wire energy, and IR drop are presented. Wires are increasingly important in design decisions, especially for large systems; and cycle-to-cycle variations have large impact on learning performance.
Keywords :
"Wires","Hardware","Programming","Neurons","Training","Performance evaluation","Neuromorphics"
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting (IEDM), 2015 IEEE International
Electronic_ISBN :
2156-017X
Type :
conf
DOI :
10.1109/IEDM.2015.7409622
Filename :
7409622
Link To Document :
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