Carrier transport analysis of high-performance poly-Si Nanowire transistor fabricated by advanced SPC with record-high electron mobility

This paper presents the fundamental carrier transport analysis of high-mobility poly-Si nanowire transistors (NW Tr). By adopting advanced SPC (solid-phase crystallization) process, record-high electron mobility (192cm²/Vs) and Ion (200μA/μm) at I_off of 4nA/μm are achieved without using lasers or catalysts. Carrier density and temperature dependence of mobility, and also physical analysis of poly-Si crystallinity and the channel size, reveal that the origin of mobility degradation in conventional SPC poly-Si Tr. is Coulomb scattering due to defects inside grains as well as defects at grain boundaries and enhanced surface roughness scattering at poly-Si/gate oxide interface, all of which are weakened by advanced SPC process. At high carrier density, mobility of poly-Si nFETs and pFETs by advanced SPC process even exceeds bulk-Si (110) nFETs and (100) pFETs.