DocumentCode
3748100
Title
Mapping of wafer-level plasma induced charge contour by novel on-chip in-situ recorders in advance FinFET technologies
Author
Chun-Hsiung Wu;Yi-Pei Tsai;Chrong Jung Lin;Ya-Chin King
Author_Institution
Microelectronics Laboratory, Institute of Electronics Engineering, National Tsing Hua University, Hsinchu, Taiwan
fYear
2015
Abstract
A novel approach of monitoring wafer-level plasma induced charging contours in FinFET process is proposed. On-chip charge collectors consist of antenna coupled floating gates have been demonstrated to record plasma charging levels during BEOL processes. Data on these in-situ recorders reflect actual potential on transistor gates during plasma charging stress. Wafer maps, containing positive and negative charging levels and antenna potential contours, provides a powerful tool for future FinFET process optimization and reliability evaluations.
Keywords
"Plasmas","Metals","Logic gates","FinFETs","Monitoring","Slot antennas"
Publisher
ieee
Conference_Titel
Electron Devices Meeting (IEDM), 2015 IEEE International
Electronic_ISBN
2156-017X
Type
conf
DOI
10.1109/IEDM.2015.7409644
Filename
7409644
Link To Document