DocumentCode
3748197
Title
Hot carrier aging and its variation under use-bias: Kinetics, prediction, impact on Vdd and SRAM
Author
M. Duan;J. F. Zhang;A. Manut;Z. Ji;W. Zhang;A. Asenov;L. Gerrer;D. Reid;H. Razaidi;D. Vigar;V. Chandra;R. Aitken;B. Kaczer;G. Groeseneken
Author_Institution
School of Engineering, Liverpool John Moores University, Byrom Street, Liverpool L3 3AF, UK
fYear
2015
Abstract
As CMOS scales down, hot carrier aging (HCA) scales up and can be a limiting aging process again. This has motivated re-visiting HCA, but recent works have focused on accelerated HCA by raising stress biases and there is little information on HCA under use-biases. Early works proposed that HCA mechanism under high and low biases are different, questioning if the high-bias data can be used for predicting HCA under use-bias. A key advance of this work is proposing a new methodology for evaluating the HCA-induced variation under use-bias. For the first time, the capability of predicting HCA under use-bias is experimentally verified. The importance of separating RTN from HCA is demonstrated. We point out the HCA measured by the commercial Source-Measure-Unit (SMU) gives erroneous power exponent. The proposed methodology minimizes the number of tests and the model requires only 3 fitting parameters, making it readily implementable.
Keywords
"Stress","Aging","Acceleration","Kinetic theory","MOSFET","Predictive models","Fitting"
Publisher
ieee
Conference_Titel
Electron Devices Meeting (IEDM), 2015 IEEE International
Electronic_ISBN
2156-017X
Type
conf
DOI
10.1109/IEDM.2015.7409742
Filename
7409742
Link To Document